Image data captured by an image sensor or received from other data sources is often processed in an image processing pipeline before further processing or consumption. For example, raw image data may be corrected, filtered, or otherwise modified before being provided to subsequent components such as a video encoder. To perform corrections or enhancements for captured image data, various components, unit stages or modules may be employed.
Such an image processing pipeline may be structured so that corrections or enhancements to the captured image data can be performed in an expedient way without consuming other system resources. Although many image processing algorithms may be performed by executing software programs on a central processing unit (CPU), execution of such programs on the CPU would consume significant bandwidth of the CPU and other peripheral resources as well as increase power consumption. Hence, image processing pipelines are often implemented as a hardware component separate from the CPU and dedicated to perform one or more image processing algorithms.
Image data may be captured by two image sensors, and processed by separate dedicated image processing pipelines. For example, a device may have two cameras where each camera has a different focal length and viewing angle. When a user viewing the device switches camera views between the two cameras, it is desirable to display the transition between the two camera views with a smooth transition. The smooth transition may be a zoom-in feature from a wide angle camera to a telephoto camera or a zoom-out feature from a telephoto camera to a wide angle camera. However, supporting such a feature of the smooth transition between the two cameras may consume computing resources of a processor that may also perform other processing operations and slow down overall processing operations as well as consume power to perform the transition operation.